func.func @main_graph$async_dispatch_33_softmax_Dx28xDxDxf32_generic() { %c32_i64 = arith.constant 32 : i64 %cst = arith.constant 0.000000e+00 : f32 %cst_0 = arith.constant 0xFF800000 : f32 %c0 = arith.constant 0 : index %0 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(0) : i32 %1 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(1) : i32 %2 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(2) : i32 %3 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(3) : i32 %4 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(4) : i32 %5 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(5) : i32 %6 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(6) : i32 %7 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(7) : i32 %8 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(8) : i32 %9 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(9) : i32 %10 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(10) : i32 %11 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(11) : i32 %12 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(12) : i32 %13 = hal.interface.constant.load layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) ordinal(13) : i32 %14 = arith.extui %0 : i32 to i64 %15 = arith.extui %1 : i32 to i64 %16 = arith.shli %15, %c32_i64 : i64 %17 = arith.ori %14, %16 : i64 %18 = arith.index_castui %17 : i64 to index %19 = arith.extui %2 : i32 to i64 %20 = arith.extui %3 : i32 to i64 %21 = arith.shli %20, %c32_i64 : i64 %22 = arith.ori %19, %21 : i64 %23 = arith.index_castui %22 : i64 to index %24 = arith.extui %4 : i32 to i64 %25 = arith.extui %5 : i32 to i64 %26 = arith.shli %25, %c32_i64 : i64 %27 = arith.ori %24, %26 : i64 %28 = arith.index_castui %27 : i64 to index %29 = arith.extui %6 : i32 to i64 %30 = arith.extui %7 : i32 to i64 %31 = arith.shli %30, %c32_i64 : i64 %32 = arith.ori %29, %31 : i64 %33 = arith.index_castui %32 : i64 to index %34 = arith.extui %8 : i32 to i64 %35 = arith.extui %9 : i32 to i64 %36 = arith.shli %35, %c32_i64 : i64 %37 = arith.ori %34, %36 : i64 %38 = arith.index_castui %37 : i64 to index %39 = arith.extui %10 : i32 to i64 %40 = arith.extui %11 : i32 to i64 %41 = arith.shli %40, %c32_i64 : i64 %42 = arith.ori %39, %41 : i64 %43 = arith.index_castui %42 : i64 to index %44 = arith.extui %12 : i32 to i64 %45 = arith.extui %13 : i32 to i64 %46 = arith.shli %45, %c32_i64 : i64 %47 = arith.ori %44, %46 : i64 %48 = arith.index_castui %47 : i64 to index %49:7 = util.assume.int %18, %23, %28, %33, %38, %43, %48 : index, index, index, index, index, index, index %50 = iree_tensor_ext.dispatch.workload.ordinal %49#1, 0 : index %51 = iree_tensor_ext.dispatch.workload.ordinal %49#3, 2 : index %52 = iree_tensor_ext.dispatch.workload.ordinal %49#4, 3 : index %53 = iree_tensor_ext.dispatch.workload.ordinal %49#5, 4 : index %54 = iree_tensor_ext.dispatch.workload.ordinal %49#6, 5 : index %55 = hal.interface.binding.subspan layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) binding(0) alignment(64) offset(%c0) flags("ReadOnly|Indirect") : !iree_tensor_ext.dispatch.tensor>{%50, %51, %52} %56 = hal.interface.binding.subspan layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) binding(1) alignment(64) offset(%49#0) flags("ReadOnly|Indirect") : !iree_tensor_ext.dispatch.tensor>{%53, %51, %54} %57 = hal.interface.binding.subspan layout(, #hal.pipeline.binding, #hal.pipeline.binding], flags = Indirect>) binding(2) alignment(64) offset(%c0) flags(Indirect) : !iree_tensor_ext.dispatch.tensor>{%53, %51, %54} %58 = iree_tensor_ext.dispatch.workload.ordinal %49#2, 1 : index %59 = iree_tensor_ext.dispatch.tensor.load %56, offsets = [0, 0, 0, 0], sizes = [%53, 28, %51, %54], strides = [1, 1, 1, 1] : !iree_tensor_ext.dispatch.tensor>{%53, %51, %54} -> tensor %60 = tensor.empty(%53, %51, %54) : tensor %61 = iree_tensor_ext.dispatch.tensor.load %55, offsets = [0, 0, 0, 0], sizes = [%50, 1, %51, %58], strides = [1, 1, 1, 1] : !iree_tensor_ext.dispatch.tensor>{%50, %51, %52} -> tensor %62 = arith.trunci %61 : tensor to tensor %63 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3) -> (d0, d1, d2, d3)>, affine_map<(d0, d1, d2, d3) -> (d0, d2, d3)>, affine_map<(d0, d1, d2, d3) -> (d0, d1, d2, d3)>], iterator_types = ["parallel", "parallel", "parallel", "parallel"]} ins(%59, %62 : tensor, tensor) outs(%60 : tensor) { ^bb0(%in: f16, %in_1: i1, %out: f32): %66 = arith.select %in_1, %cst, %cst_0 : f32 %67 = arith.extf %in : f16 to f32 %68 = arith.addf %67, %66 : f32 linalg.yield %68 : f32 } -> tensor %64 = linalg.softmax dimension(3) ins(%63 : tensor) outs(%60 : tensor) -> tensor %65 = linalg.generic {indexing_maps = [affine_map<(d0, d1, d2, d3) -> (d0, d1, d2, d3)>, affine_map<(d0, d1, d2, d3) -> (d0, d1, d2, d3)>], iterator_types = ["parallel", "parallel", "parallel", "parallel"]} ins(%64 : tensor) outs(%60 : tensor) { ^bb0(%in: f32, %out: f32): %66 = arith.cmpf une, %in, %in : f32 %67 = arith.select %66, %cst, %in : f32 linalg.yield %67 : f32 } -> tensor iree_tensor_ext.dispatch.tensor.store %65, %57, offsets = [0, 0, 0, 0], sizes = [%53, 28, %51, %54], strides = [1, 1, 1, 1] : tensor -> !iree_tensor_ext.dispatch.tensor>{%53, %51, %54} return }